Based on high-density integration using nano-processing techniques, silicon semiconductor devices serve as the backbone of current information-driven society. In connection with the existing need for higher operation speed and higher-density integration in silicon semiconductor devices, the contact resistance between wirings becomes a critical factor dominating the operational limit of these devices.
Heretofore, an aluminum thin wire has been used as a wiring material for highly integrated silicon semiconductor devices. However, a thinner wire required for the high-density integration and ultra-miniaturization of silicon semiconductor devices inevitably has higher resistivity and contact resistance, and resulting increased heat generation causes deterioration in durability of the devices which hinders higher-density integration. In this context, a technique of reducing the resistance using a copper (Cu) thin wire has been developed and actually used in a part of CPUs.
During a semiconductor forming process and a wiring printing process using lithography, Cu atoms are mixed in a silicon device through diffusion to form a deep impurity level in the bandgap of a silicon crystal. Moreover, the Cu atoms are incorporated in the silicon crystal through ultra high-speed diffusion to form deep impurity levels all over the silicon crystal, which are likely to serve as a carrier killer or cause dielectric breakdown. Consequently, in the existing circumstances, the devices using Cu thin wires have poor process yield.
While a transition metal impurity, particularly Co, Ni or Cu, which is released from raw materials during the formation of a silicon-single-crystal through a Czochralski crystal pulling process or the like and mixed in the crystal as a solid solution, is insignificant if the device has a relatively large size, even a small amount of transition metal impurity residing in the device has a great impact on the quality and process yield of the device in the present circumstances where the device is ultra-miniaturized in conjunction with the need for high densification.
In view of these situations, there has been employed a method, so-called gettering, for eliminating a transition metal impurity which is contained in a wafer subject to device processing and likely to serve as a carrier killer, or for confining the transition metal impurity at a position away from a surface for use in device processing to immobilize it during heat treatment or device processing (for example, the following Patent Publications 1, 2 and 3)
Patent Publication 1: Japanese Patent Laid-Open Publication No. 10-303430
Patent Publication 2: Japanese Patent Laid-Open Publication No. 2001-250957                Patent Publication 3: Japanese Patent Laid-Open Publication No. 2001-274405        
However, these conventional techniques have difficulties in producing the device while completely eliminating any transition metal impurity defused at ultra high-speeds to form deep impurity levels. Thus, in the production process of silicon semiconductor devices, it is an essential factor to solve this problem.